PIRAQ
III – PC-Integrated Radar AcQuisition System (Version 3)
The PIRAQ III is ATD’s patented PCI based data acquisition and signal processing system. Designed to be state of the art and multifunctional, the card was developed for customized use in ongoing and future radar applications. Currently PIRAQ III is in use in the Rapid DOW system and will eventually be integrated into S-POL and ELDORA. The card has also been licensed to Vaisala – used in their wind profiler systems.
PIRAQ III is a PCI based data acquisition and signal
processing system on a single printed circuit board. The signal processor has been developed to acquire high speed
wide dynamic range data and to have the onboard processing capability to deliver
a very high quality raw data stream (I,Q) for subsequent processing by multiple
PCs. If less processing is required on the raw data then the on-board DSP can be
used for autocovariance and/or other signal processing.
For traditional Radar applications, the Piraq III offers two data acquisition channels to provide overlapping dynamic range of the input. Either a 60 MHz or a 16 MHz Intermediate Frequency (IF) can be used. For a 60 MHz IF, each channel sub-samples the IF at 48 MHz; this yields a signal centered at 12 MHz oversampled 4 times. If a 16 MHz IF is used, then each channel is sampled at 64 MHz. This also yields a signal oversampled by a factor of 4. The samples are divided into even and odd sampled streams. This forms the basis for the in-phase and quadrature data outputs. By judiciously choosing the signs and weights of the coefficients within the FIR chips, decimated (to the desired gate spacing) in-phase and quadrature data streams are available to the user. The DSP can be used to perform further filtering, phase noise compensation, high or low dynamic range channel selection, and other user defined tasks.
Technical Details
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| Figure 1 shows a basic block diagram of the PIRAQ III. The card features two 14 bit analog to digital converters running at up to 64 MHz. Each ADC feeds a pair of GC2011A FIR Filter chips, which can be used to perform Quadrature down conversion, filtering and decimation of the input stream. 18 bit In-phase and Quadrature data are output from the FIR chips and stored in separate FIFO buffers where they are available to the DSP for further processing. The DSP used is a TMS320C6701, running at 160MHz and capable of 900 MFLOPS peak processing performance. In addition to the DSPs 64KB internal program RAM and 64KB data RAM, there is 256KB of full-speed SBSRAM and 16MB of ½ speed SDRAM. The Card supports 32bit 33MHz PCI bus initiator and target interfaces and can interrupt the PC’s CPU as well be interrupted. In addition, the PIRAQ III provides all the necessary timing signals to control data acquisition and to synchronize multiple boards. |
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Contact
Eric Loew Engineering and Development
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